1. Field of the Invention
The present invention relates generally to a demodulation apparatus and method in a digital communication system employing multi-level modulation, and in particular, to a demodulation apparatus and method for calculating soft decision values needed as inputs to a channel decoder in a demodulator for a digital communication system employing 8-ary PSK (Phase Shift Keying) modulation.
2. Description of the Related Art
In a digital communication system employing 8-ary PSK modulation, a kind of multi-level modulations, to increase spectral efficiency, a signal encoded by a channel encoder is transmitted after being modulated. A demodulator then demodulates the signal transmitted and provides the demodulated signal to a channel decoder for decoding. The channel decoder performs soft decision decoding in order to correct errors. To do so, the demodulator must have a mapping algorithm for generating soft decision values (or soft values) corresponding to output bits of the channel encoder from a 2-dimensional signal comprised of an in-phase signal component and a quadrature-phase signal component.
The mapping algorithm is classified into a simple metric procedure proposed by Nokia and a dual minimum metric procedure proposed by Motorola. Both algorithms calculate LLR (Log Likelihood Ratio) for the output bits and use the calculated LLR as an input soft decision value of the channel decoder.
The simple metric procedure, a mapping algorithm given by modifying a complex LLR calculation formula into a simple approximate formula, has a simple LLR calculation formula, but LLR distortion caused by the use of the approximate formula leads to performance degradation. The dual minimum metric procedure, a mapping algorithm of calculating LLR with a more accurate approximate formula and using the calculated LLR as an input soft decision value of the channel decoder, can make up for performance degradation of the simple metric procedure to some extent. However, compared with the simple metric procedure, this procedure needs increased calculations, thus causing a considerable increase in hardware complexity.